There is presently enormous interest in flexible substrate thin film transistors. However, most organic thin film transistors are very low performance devices, i.e. the mobility of the organic material is very low. The FIGURE of merit in TFTs is defined by μV/L2 where μ is the mobility, V is the voltage and L is the gate length. Further, it is generally desirable to use a low source voltage (10 volts or less) in operation of the device. Thus, the mobility must be relatively high for high performance devices. One problem with inorganic materials grown at low temperature can be the mobility, e.g. the mobility of amorphous silicon is in a range of 0.1 to 1 cm2/V.sec.
Attempts to produce inorganic thin film transistors compatible with flexible substrates have not been very successful because most of the inorganic material used requires relatively high temperature processing steps. Inorganic semiconductor materials often suffer from Fermi level pinning at the interface with inorganic dielectric material due to reaction between the inorganic materials at the interface. Also, inorganic dielectrics are polar material and have been shown to give rise to gap states formation and interface scattering in the semiconductor channel, resulting in lower channel mobility. Thus, while the mobility may be high in the material itself, the effective mobility is reduced substantially within a device because of interaction between materials. For example, in order to place a gate dielectric on a semiconductor the semiconductor must generally be passivated so that the two materials do not interact at the interface to produce the undesirable interface states. The standard passivation techniques (generally including annealing) require relatively high temperatures, e.g. >200° C., which is too high for flexible plastic substrates. In addition, inorganic dielectrics are not truly compatible with flexible substrate processing and their long-term mechanical flexibility is questionable.
For gate dielectric materials, the FIGURE of merit is C/J where C is the capacitance per unit area and J is the leakage per unit area. With reference to layers of inorganic dielectric material, besides the heat required in the process, a typical deposition process, such as sputtering for example, leaves pinholes throughout the material. These pinholes result in gate leakage current which can greatly reduce the operation of the device. In the prior art, to overcome this leakage the dielectric layer is made substantially thicker. Thus, while it is desirable to make the gate dielectric layer as thin as possible to reduce operating voltages and increase gate capacitance, the thickness of gate dielectric material must be increased to reduce leakage to a manageable level. The FIGURE of merit is, therefore, limited in any material deposited by typical deposition methods.
Also, in many applications it is desirable to incorporate non-volatile memory into the device. In the past this was accomplished by using inorganic ferroelectric material. However, this inorganic ferroelectric material can only be deposited at high temperatures and is not compatible with flexible substrates.
It would be highly advantageous, therefore, to remedy the foregoing and other deficiencies inherent in the prior art.
Accordingly, it is an object of the present invention to provide new and improved high performance thin film transistors compatible with flexible substrates.
It is another object of the present invention to provide new and improved high performance thin film transistors with memory and compatible with flexible substrates.
It is another object of the present invention to provide new and improved high performance thin film transistors compatible with flexible substrates with thinner gate dielectric and less gate leakage.
It is another object of the present invention to provide a method of fabricating high performance thin film transistors compatible with flexible substrates with thinner gate dielectric and less gate leakage.